Next generation memory chips from silicon oxide and graphene

A group of researchers from Rice University led by chemist James Tour came to a discovery that it was possible to make bits of computer memory from silicon oxide and carbon. Their research could lead to transparent, non-volatile, heat- and radiation-resistant memory chips which provide more memory storage while being smaller compared to memory chips available on the market today.

Tour and his colleagues revealed their accomplishment where they managed to create memory chips from silicon oxide sandwiched between electrodes of graphene – a single-atom-thick form of carbon. The resulting memory can be embedded into flexible pieces of plastic, thus leading to paper-thin, see-through memories.

While researchers in the ‘60s and ‘70s characterized silicon oxide as impractical due to its brittleness, the researchers at Rice University used this property to achieve their goal. They applied strips of graphite across a silicon oxide substrate and noticed that applying strong voltage would break the carbon, while lower voltages would repeatedly heal and re-break the circuit. These properties can be used in logic where a break could be a “0″ and a healed circuit could be a “1”.

In the breakthrough 2010 paper that followed the 2008 discovery, the researchers led by then-graduate student Jun Yao found that a strong jolt of voltage through a piece of silicon oxide stripped oxygen atoms from a channel only 5 nanometers wide, turning it into pure silicon. Lower voltages would break the channel or reconnect it, repeatedly, thousands of times. Yao’s revelation became the basis for the next-generation memories now being designed in Tour’s lab, where silicon oxides sandwiched between graphene layers are being attached to plastic sheets.

“The interest is starting to climb”, said Tour. “We’re working with several companies that are interested either in getting their chips to do this kind of switching or in the possibility of making radiation-hard devices out of this.”

Unlike other currently available memory devices which require three wires (or terminals) to control and read each bit, the memory unit developed by Rice researchers requires only two terminals. This approach allows stacking of two-terminal memories in 3D configurations, thus significantly increasing the amount of information a chip could hold. A set of chips made from silicon oxide was sent to the ISS, where they will stay for two years to test their ability to hold a pattern when exposed to radiation in space.

“Now we’re making these memories with about an 80 percent yield of working devices, which is pretty good for a non-industrial lab”, said Tour. “When you get these ideas into industries’ hands, they really sharpen it up.”

Researchers at Rice and laboratories in other institutions are working to increase silicon memory’s capacity and improve its reliability while electronics manufacturers think hard about how to make it in bulk and put it into new generation of memory products.

For more information, read the article published in the journal Nature Communications: “Highly transparent nonvolatile resistive memory devices from silicon oxide and graphene”.